This invention relates to semiconductor transistors, and specifically to insulated-gate field-effect transistors, such as metal-oxide-semiconductor (MOS) transistors.
Electronic devices ranging from discrete transistors to VLSI (Very Large Scale Integration) circuits have been improved in cost and performance in many ways over the past years. One of these ways is by reducing the size of the circuit elements used. A basic circuit element is the transistor, and in the more advanced and higher density circuits, the insulated-gate field-effect transistor (IGFET). Current technology primarily uses silicon as the semiconductor and silicon-oxide as the insulator in such transistors; the resultant transistor is thus commonly called the metal-oxide-semiconductor field-effect transistor, or MOSFET. Therefore, the smaller the MOSFET that can be fabricated, the more MOSFETs that can occupy a given surface area on a silicon slice, in turn allowing the manufacture of more complex and powerful VLSI circuits at reduced cost.
Limitations in the reduction in the size of the MOSFET often exist at the dimension of the channel length of the transistor. The channel is the area between the source and drain of a MOSFET which, in digital applications, is selectively made non-conductive and conductive to effect the desired digital operation. A well defined channel is therefore essential in fabricating a functional semiconductor device. However, as the desired channel length becomes increasingly smaller, small manufacturing errors, or small particulate contaminants, can more easily cause the channel to be permanently short-circuited, rendering the transistor and the VLSI device non-functional.
In addition, as is well known in the art, the channel length controls important electrical characteristics of the device. One of these characteristics is the value of the dependence on source-to-drain current on the gate voltage, commonly called the transconductance of the device. The switching speed of the transistor increases as the transconductance of the device increases. In order to fabricate an integrated circuit having the desired electrical behavior, the transconductance of the individual transistors within the integrated circuit must be well-controlled. This requires that the channel length of the MOS transistors in such devices must be well controlled.
It is therefore desirable that MOSFETs having very small yet controllable channel lengths be incorporated into VLSI circuit designs. Heretofore, the minimum channel lengths that have been controllable have been on the order of one micron (micrometer). Curent methods, primarily photolithographic in nature, have precluded substantial manufacture of smaller transistors, since it is difficult for current equipment to print patterns of smaller than one micron, with tolerances better than 20%. If channel lengths vary by 20% within a device, or from device to device, the electrical performance of the circuits will be less than desired.
It is therefore an object of this invention to provide an MOS transistor structure having a short channel length which can be fabricated by a method allowing for a high degree of channel length control.
It is a further object of this invention to provide an MOS transistor structure having a well-controlled channel length, and which minimizes gate-to-drain capacitance.
It is a further object of this invention to provide an MOS transistor structure having a sub-micron channel length and which occupies small silicon surface area.
It is a further object of this invention to provide a method for fabricating such an MOS transistor structure.
Other objects and advantages of the invention will become apparent to those skilled in the art, having reference to the specification and the drawings below.